Alif Semiconductor /AE512F80F5582LS_CM55_HE_View /DMA2_SEC /DMA_CR0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DMA_CR0

MGR_NS_AT_RST=Val_0x0, BOOT_EN=Val_0x0

Description

Configuration Register 0

Fields

PERIPH_REQ	Supports peripheral requests. 1 (Val_0x1): The DMAC provides the number of peripheral request interfaces that the NUM_PERIPH_REQ field specifies.
BOOT_EN	Indicates the srunning state when the DMAC exited from reset. 0 (Val_0x0): Stopped state and waits for an instruction from the Secure APB interface. 1 (Val_0x1): Running state.
MGR_NS_AT_RST	Indicates DMA manager is in the secure state when the DMAC exited from reset. 0 (Val_0x0): DMA manager is in the secure state. 1 (Val_0x1): DMA manager is in the non-Secure state.
NUM_CHNLS	Number of DMA channels that the DMAC supports. 7 (Val_0x7): 8 DMA channels.
NUM_PERIPH_REQ	Number of peripheral request interfaces that the DMAC provides. 31 (Val_0x1F): 32 peripheral request interfaces.
NUM_EVENTS	Number of interrupt outputs that the DMAC provides. 31 (Val_0x1F): 32 interrupt outputs, IRQ[31:0].

Links

() ()